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NXP Semiconductors /MK65F18 /GPIOE /PSOR

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Interpret as PSOR

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https://regviz.com/r/NXP Semiconductors/MK65F18/GPIOC/PSOR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)PTSO0 0 (0)PTSO1 0 (0)PTSO2 0 (0)PTSO3 0 (0)PTSO4 0 (0)PTSO5 0 (0)PTSO6 0 (0)PTSO7 0 (0)PTSO8 0 (0)PTSO9 0 (0)PTSO10 0 (0)PTSO11 0 (0)PTSO12 0 (0)PTSO13 0 (0)PTSO14 0 (0)PTSO15 0 (0)PTSO16 0 (0)PTSO17 0 (0)PTSO18 0 (0)PTSO19 0 (0)PTSO20 0 (0)PTSO21 0 (0)PTSO22 0 (0)PTSO23 0 (0)PTSO24 0 (0)PTSO25 0 (0)PTSO26 0 (0)PTSO27 0 (0)PTSO28 0 (0)PTSO29 0 (0)PTSO30 0 (0)PTSO31

PTSO24=0, PTSO6=0, PTSO14=0, PTSO21=0, PTSO2=0, PTSO8=0, PTSO28=0, PTSO17=0, PTSO23=0, PTSO31=0, PTSO16=0, PTSO5=0, PTSO9=0, PTSO19=0, PTSO13=0, PTSO11=0, PTSO27=0, PTSO3=0, PTSO7=0, PTSO4=0, PTSO30=0, PTSO1=0, PTSO25=0, PTSO26=0, PTSO0=0, PTSO18=0, PTSO20=0, PTSO15=0, PTSO22=0, PTSO10=0, PTSO12=0, PTSO29=0

Description

Port Set Output Register

Fields

PTSO0

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO1

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO2

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO3

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO4

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO5

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO6

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO7

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO8

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO9

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO10

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO11

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO12

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO13

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO14

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO15

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO16

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO17

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO18

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO19

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO20

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO21

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO22

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO23

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO24

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO25

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO26

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO27

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO28

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO29

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO30

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.
PTSO31

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data